1. Field of the Invention
The present invention relates to a semiconductor package having a built-in Micro Electric Mechanical System, and to a manufacturing method thereof.
2. Description of the Related Art
Conventionally, as disclosed in Unexamined Japanese Patent Application KOKAI Publication No. 2002-57291, there is such a semiconductor package in which on a semiconductor substrate, a first conductive layer, a dielectric layer, and a second conductive layer are stacked to form a three-dimensional capacitor element, a pole electrode is formed on the capacitor element, and the pole electrode including the capacitor element is covered with a sealing film. Since this semiconductor package has the three-dimensional capacitor element formed on the semiconductor substrate, the package can be miniaturized as a whole, as compared with a case where the three-dimensional capacitor element is mounted on a circuit board.
Recently, MEMS (Micro Electric Mechanical System) components such as a minute and three-dimensional acceleration sensor, etc. have been developed by utilizing miniaturization technologies accumulated in semiconductor manufacture technologies. Since such an MEMS component is not a component integral with a semiconductor package, use of the MEMS component enlarges the mounting area and cannot miniaturize the semiconductor package as a whole.